Many signal processing systems require accurate multiplications, filtering, convolutions, and cross-correlations. Such applications include sonars, radars, frequency domain beamformers, and image-processing transform apparatus. The usefulness of very high-speed analog devices to perform these operations is often limited by the accuracy of the devices. This invention relates to the design of composite analog-digital devices consisting of several standard analog devices and digital residue class arithmetic coding and decoding devices to perform these operations in such a manner as to allow several orders of magnitude improvement in the accuracy achievable by using the composite device over the accuracy of the component analog devices.
In order to obtain increased accuracy, operations are ordinarily performed using all digital arithmetic. This results in a large number of logic gates being required to implement an accurate adder or multiplier. If a transversal filter were to be implemented by direct digital means, it would either require a vast number of logic gates or would have to use a small number of high speed multipliers, resulting in a loss of speed.